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 HD74HC564, HD74HC574
Octal D-type Flip-Flops (with 3-state outputs)
REJ03D0630-0200 (Previous ADE-205-510) Rev.2.00 Mar 30, 2006
Description
These devices are positive edge triggered flip-flops. The difference between HD74HC564 and HD74HC574 is only that the former has inverting outputs and the latter has noninvertering outputs. Data at the D inputs, meeting the set-up and hold time requirements, are transferred to the Q or Q outputs on positive going transitions of the clock (CK) input. When a high logic level is applied to the output control (OC) input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements.
Features
* High Speed Operation: tpd (Clock to Output) = 13 ns typ (CL = 50 pF) * High Output Current: Fanout of 15 LSTTL Loads * Wide Operating Voltage: VCC = 2 to 6 V * Low Input Current: 1 A max * Low Quiescent Supply Current: ICC (static) = 4 A max (Ta = 25C) * Ordering Information
Part Name HD74HC564P HD74HC574P HD74HC564FPEL HD74HC574FPEL HD74HC564RPEL Package Type DILP-20 pin SOP-20 pin (JEITA) SOP-20 pin (JEDEC) Package Code (Previous Code) PRDP0020AC-B (DP-20NEV) PRSP0020DD-B (FP-20DAV) Package Abbreviation P FP -- EL (2,000 pcs/reel) EL (1,000 pcs/reel) Taping Abbreviation (Quantity)
PRSP0020DC-A RP (FP-20DBV) Note: Please consult the sales office for the above package availability.
Function Table
Output Control L L L H Q0 : Q0 : L X Inputs Clock Outputs Data H L X X HD74HC564 L H Q0 Z HD74HC574 H L Q0 Z
level of Q before the indicated Steady-sate input conditions were established. complement of Q0 or level of Q before the indicated Steady-state input Conditions were established.
Rev.2.00 Mar 30, 2006 page 1 of 9
HD74HC564, HD74HC574
Pin Arrangement
HD74HC564
Output 1 Control 1D 2 2D 3 3D 4 4D 5 5D 6 6D 7 7D 8 8D 9 GND 10 OE DQ OE DQ OE DQ OE DQ OE DQ OE DQ OE DQ OE DQ
20 VCC 19 1Q 18 2Q 17 3Q 16 4Q 15 5Q 14 6Q 13 7Q 12 8Q 11 Clock
(Top view)
HD74HC574
Output 1 Control 1D 2 2D 3 3D 4 4D 5 5D 6 6D 7 7D 8 8D 9 GND 10 OE DQ OE DQ OE DQ OE DQ OE DQ OE DQ OE DQ OE DQ
20 VCC 19 1Q 18 2Q 17 3Q 16 4Q 15 5Q 14 6Q 13 7Q 12 8Q 11 Clock
(Top view)
Rev.2.00 Mar 30, 2006 page 2 of 9
HD74HC564, HD74HC574
Logic Diagram
HD74HC564
1D D C C D C C D C C D C C D C C D C C D C C D C C
Q
1Q
2D
Q
2Q
3D
Q
3Q
4D
Q
4Q
5D
Q
5Q
6D
Q
6Q
7D
Q
7Q
8D
Q
8Q
CLK
OC
Rev.2.00 Mar 30, 2006 page 3 of 9
HD74HC564, HD74HC574 HD74HC574
1D D C C D C C D C C D C C D C C D C C D C C D C C
Q
1Q
2D
Q
2Q
3D
Q
3Q
4D
Q
4Q
5D
Q
5Q
6D
Q
6Q
7D
Q
7Q
8D
Q
8Q
CLK
OC
Rev.2.00 Mar 30, 2006 page 4 of 9
HD74HC564, HD74HC574
Absolute Maximum Ratings
Item Supply voltage range Input / Output voltage Input / Output diode current Output current VCC, GND current Power dissipation Symbol VCC VIN, VOUT IIK, IOK IO ICC or IGND PT Ratings -0.5 to 7.0 -0.5 to VCC +0.5 20 35 75 500 Unit V V mA mA mA mW
Storage temperature Tstg -65 to +150 C Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time.
Recommended Operating Conditions
Item Supply voltage Input / Output voltage Operating temperature Input rise / fall time Note:
*1
Symbol VCC VIN, VOUT Ta tr , tf
Ratings 2 to 6 0 to VCC -40 to 85 0 to 1000 0 to 500
Unit V V C ns
Conditions
VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V
0 to 400 1. This item guarantees maximum limit when one input switches. Waveform: Refer to test circuit of switching characteristics.
Electrical Characteristics
Item Input voltage Symbol VCC (V) VIH 2.0 4.5 6.0 2.0 4.5 6.0 Output voltage VOH 2.0 4.5 6.0 4.5 VOL 6.0 2.0 4.5 6.0 4.5 6.0 Off-state output current Input current Quiescent supply current IOZ Iin ICC 6.0 6.0 6.0 Min 1.5 3.15 4.2 -- -- -- 1.9 4.4 5.9 4.18 5.68 -- -- -- -- -- -- -- -- Ta = 25C Typ Max -- -- -- -- -- -- 2.0 4.5 6.0 -- -- 0.0 0.0 0.0 -- -- -- -- -- -- -- -- 0.5 1.35 1.8 -- -- -- -- -- 0.1 0.1 0.1 0.26 0.26 0.5 0.1 4.0 Ta = -40 to+85C Unit Min Max 1.5 3.15 4.2 -- -- -- 1.9 4.4 5.9 4.13 5.63 -- -- -- -- -- -- -- -- -- -- -- 0.5 1.35 1.8 -- -- -- -- -- 0.1 0.1 0.1 0.33 0.33 5.0 1.0 40 IOL = 6 mA IOL = 7.8 mA A Vin = VIH or VIL, Vout = VCC or GND A Vin = VCC or GND A Vin = VCC or GND, Iout = 0 A V V Vin = VIH or VIL IOH = -20 A V Test Conditions
VIL
V
IOH = -6 mA IOH = -7.8 mA Vin = VIH or VIL IOL = 20 A
Rev.2.00 Mar 30, 2006 page 5 of 9
HD74HC564, HD74HC574
Switching Characteristics (CL = 50 pF, Input tr = tf = 6 ns)
Ta = 25C Item Maximum clock frequency Propagation delay time Output enable time Output disable time Setup time Symbol VCC (V) fmax 2.0 4.5 6.0 tPLH tPHL tZH tZL tHZ tLZ tsu 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 Hold time th 2.0 4.5 6.0 2.0 4.5 6.0 Output rise/fall time Input capacitance tTLH tTHL Cin 2.0 4.5 6.0 -- Min -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 5 5 5 80 16 14 -- -- -- -- Typ -- -- -- -- 13 -- -- 13 -- -- 15 -- -- 1 -- -- 0 -- -- 4 -- -- 4 -- 5 Max 6 30 35 155 31 26 150 30 26 150 30 26 100 20 17 -- -- -- -- -- -- 60 12 10 10 Ta = -40 to +85C Min -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 5 5 5 100 20 17 -- -- -- -- Max 5 24 28 195 39 33 190 38 33 190 38 33 125 25 21 -- -- -- -- -- -- 75 15 13 10 ns ns ns ns Clock to output Unit MHz Test Conditions
ns
ns
Pulse width
tw
ns
pF
Test Circuit
VCC VCC Output
See Function Table
Input Pulse Generator Zout = 50 Input Pulse Generator Zout = 50
OC
1Q to 8Q or 1Q to 8Q
1 k CL = 50 pF
S1
OPEN GND VCC
1D to 8D TEST t PLH / t PHL t ZH/ t HZ t ZL / t LZ S1 OPEN GND VCC
Clock
Note : 1. CL includes probe and jig capacitance.
Rev.2.00 Mar 30, 2006 page 6 of 9
HD74HC564, HD74HC574
Waveforms
* Waveform - 1 tr 90 % 90 % 50 % 10 % tr Input Data 90 % 10 % t PLH Output Q 50 % Output Q 50 % VOL 10 % tf 90 % 10 % t PHL tf VCC 50 % 0V VCC
Input Clock
0V VOH
* Waveform - 2 Input OC
tf 90 % 50 % 10 % t ZL
tr 90 % 50 % 10 % t LZ 50 % t ZH t HZ 50 % 90 % VCC 0V VOH
Waveform - A
10 % VOL VOH VOL
Waveform - B
Notes : 1. Input waveform : PRR 1 MHz, duty cycle 50%, tr 6 ns, tf 6 ns 2. Waveform - A is for an output with internal conditions such that the output is low except when disabled by the output control. 3. Waveform - B is for an output with internal conditions such that the output is high except when disabled by the output control. 4. The output are measured one at a time with one transition per measurement.
Rev.2.00 Mar 30, 2006 page 7 of 9
HD74HC564, HD74HC574
Package Dimensions
JEITA Package Code P-DIP20-6.3x24.5-2.54 RENESAS Code PRDP0020AC-B Previous Code DP-20NEV MASS[Typ.] 1.26g
D
20
11
1 0.89 b3
10
Z
A1
A
E
Reference Symbol
Dimension in Millimeters
Min
e
bp
e1
c
( Ni/Pd/Au plating )
e1 D E A A1 bp b3 c e Z L
Nom Max 7.62 24.50 25.40 6.30 7.00 5.08
L
0.51 0.40 0.48 0.56 1.30 0.19 0.25 0.31 0 15 2.29 2.54 2.79 1.27 2.54
JEITA Package Code P-SOP20-5.5x12.6-1.27
RENESAS Code PRSP0020DD-B
Previous Code FP-20DAV
MASS[Typ.] 0.31g
*1
D 11
F
20
NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET.
bp
HE
E
Index mark
*2
Terminal cross section ( Ni/Pd/Au plating )
1 Z e
*3
10 bp x M L1
Reference Symbol
c
Dimension in Millimeters
y
A1
L
Detail F
D E A2 A1 A bp b1 c c1 HE e x y Z L L1
Min Nom Max 12.60 13.0 5.50 0.00 0.10 0.20 2.20 0.34 0.40 0.46 0.15 0.20 0.25 0 8 7.50 7.80 8.00 1.27 0.12 0.15 0.80 0.50 0.70 0.90 1.15
Rev.2.00 Mar 30, 2006 page 8 of 9
A
HD74HC564, HD74HC574
JEITA Package Code P-SOP20-7.5x12.8-1.27 RENESAS Code PRSP0020DC-A Previous Code FP-20DBV MASS[Typ.] 0.52g
*1
D
F 11
20
NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" @ DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT @ INCLUDE TRIM OFFSET.
bp
HE E
*2
Index mark
Terminal cross section ( Ni/Pd/Au plating )
1 Z e
*3
c
Reference Symbol
Dimension in Millimeters
10 bp x M L1
A1
y
L
Detail F
D E A2 A1 A bp b1 c c1 HE e x y Z L L1
Min Nom Max 12.80 13.2 7.50 0.10 0.20 0.30 2.65 0.34 0.40 0.46 0.20 0.25 0.30 0 8 10.00 10.40 10.65 1.27 0.12 0.15 0.935 0.40 0.70 1.27 1.45
Rev.2.00 Mar 30, 2006 page 9 of 9
A
Sales Strategic Planning Div.
Keep safety first in your circuit designs!
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
RENESAS SALES OFFICES
Refer to "http://www.renesas.com/en/network" for the latest and detailed information. Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: <1> (408) 382-7500, Fax: <1> (408) 382-7501 Renesas Technology Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K. Tel: <44> (1628) 585-100, Fax: <44> (1628) 585-900 Renesas Technology (Shanghai) Co., Ltd. Unit 204, 205, AZIACenter, No.1233 Lujiazui Ring Rd, Pudong District, Shanghai, China 200120 Tel: <86> (21) 5877-1818, Fax: <86> (21) 6887-7898 Renesas Technology Hong Kong Ltd. 7th Floor, North Tower, World Finance Centre, Harbour City, 1 Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel: <852> 2265-6688, Fax: <852> 2730-6071 Renesas Technology Taiwan Co., Ltd. 10th Floor, No.99, Fushing North Road, Taipei, Taiwan Tel: <886> (2) 2715-2888, Fax: <886> (2) 2713-2999 Renesas Technology Singapore Pte. Ltd. 1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: <65> 6213-0200, Fax: <65> 6278-8001 Renesas Technology Korea Co., Ltd. Kukje Center Bldg. 18th Fl., 191, 2-ka, Hangang-ro, Yongsan-ku, Seoul 140-702, Korea Tel: <82> (2) 796-3115, Fax: <82> (2) 796-2145
http://www.renesas.com
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Colophon .6.0


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